Counter Attack! (Part 1)

Back in this Attack Formation post, I looked at how the attack setting could be made both longer and variable. I then dismissed the idea on the basis that changing 98 resistors was time consuming and risky.

But now, I'm thinking again. Really thinking. Hard.

This post is part 1. Once I've got the SS-30M powered up again I will check some things and come back for part 2.  Meanwhile this post is all worked out on paper and checked with a circuit simulator (iCircuit).

The attack control is a switch. You may recall that I bought and destroyed an entire organ to get hold of the right sort of switches for the front-panel design. I have used more controls from the donor organ than the switches in my design, but now I'm starting to wonder if I might go back to the idea of a variable attack control.

This is the basic idea - add a variable resistor where currently there's only a switch.

Doctored schematic of attack circuit

If I do indeed decide to go ahead with a variable control for attack this will have an impact on my front-panel design ideas. It's not something I can easily change later, so now is the time.

What follows is a fairly in depth analysis on the original design and the possibilities of changing resistors to achieve a better attack envelope.

Original Design Analysis

Let's start with a more thorough analysis of the original design.
Here's the datasheet for the transistor: http://rtellason.com/transdata/2sc458.pdf

The first thing to say is that the transistor is being used as a switch. Which is to say it's either in cut-off mode, where no current flows from collector to emitter, or near saturation mode (see below) where collector to emitter is a short circuit. It is in saturation mode is also used even when the collector is open-circuit. In this case, the current from base to emitter is what is significant.

Voltage 

Collector Voltage

 The collector is switched between open-circuit and ground by the Attack switch(es). Open-circuit means slow and grounded means fast attack.

Key Up

When the key is open the transistor is in cutoff mode. For the switching in general it doesn't matter what the collector voltage is at this point, so long as it is higher than Vb, but as it's open-circuit Vc will be the same as Vb, -7V. That's true in isolation, but below I look at the particular case for the collectors of all the attack circuits.

Key Down - Collector grounded

Clearly, when the collector is tied to ground the voltage (Vc) is tied to 0V and cannot be lower or higher. In saturation mode Vc must be lower than Vb and as Vb cannot be higher than 0V the transistor is actually in active  mode, where Vc > Vb > Ve. Therefore, thanks both to the presence of Rb and Vc being 0V, Vb is a small, negative voltage. I measure -0.7mV in simulation. This means the transistor is still close to saturation as Vc and Vb are almost the same and we can assume that there is no significant impact on collector-emitter current.

Key down - Collector open circuit.

When the key is down but the collector is open circuit there is a voltage on the collector. That is because as the transistor is in saturation mode and there is a short circuit between collector and emitter. Hence Vc is equivalent to Ve  and also less than Vb. I measured 540mV in simulation with a generic NPN BJT.

Collective Collectors 

The previous comments haven't referred directly to that that fact that the collectors of the attack control transistors of all the keys are connected together*. It's obvious, of course, that there is one* attack switch and 49 keys so they must be all on the same node.

When the attack switch is grounded there is no difference in the analysis. Ground is a node already. 

When the attack switch is open-circuit, all the keys are 'up' and all the transistors' Vb are -7V and all the collectors' Vb are also -7V.

But what happens when a single key is pressed?

As I noted above, for a single transistor, when the key is pressed and the attack setting is open-circuit Vc = Ve = 540mV, in simulation. If I copy the circuit and link the collectors together the common Vc is also 540mV. No surprise there! Even when only one key is pressed, all the collectors switch to the same -540mV of the one key that's been pressed because there is effectively zero resistance between them, compared to the potential brought about across the base-collector diode when the transistor is off.
With slight variances between resistors and transistors all the collectors' voltages (Vc1, Vc2... Vc49) will average out the more keys that are pressed.

Note that this means that if one transistor or resistor is wrong or faulty, the whole average for Vc will be thrown off, although not by as much as you might think. You might get one key bleeding though which is then silenced when you play another key though. One for the fault finders there!

In summary, all circuits being equal, the collector voltage doesn't matter very much in the SS-30 design. This will become important later on though, when the open-circuit attack setting instead becomes a resistance to ground.


* for the purposes of this analysis I'm ignoring the keyboard split and assuming all keys are controlled by the Violin attack switch.

 Input voltage - Key open

Base
When the key switch is open-circuit the input to Rb is held at -7V through a 3K3 resistor and a diode* in series with the -7V rail. As we’ll see, there’s no voltage drop across the base emitter junction and Vbe is 0V. Thus there’s virtually no drop across Rb and the potential difference between the -7V rail and the base is approximately 0V.

*I'm not totally sure yet why the diode is needed, but it's something to do with the emitter voltage on the other transistor, used to control Sustain time.

 Emitter
The emitter is also held at -7V. This potential comes through the two resistors, which I will call R Collector (Rc) and R Discharge (Rd), which is connected to the -7V rail.

In a more familiar circuit, it's as if the emitter is ground and the base is also switched to ground. You have to get used the 'ground' in this circuit being -7V instead of 0V.

Output Voltage - Key open

The output voltage is created by the divider between Re and Rd. In this state the potential is the same -7V throughout Re and Rd because the transistor base is also -7V. There is no voltage drop across the divider so there's no drop within it either.

The Service Manual quotes the output voltage as -6.5V +/-0.5V, which gives plenty of room for variance in the supply rail.*

*I'm not totally happy with that explanation, by the way. Maybe it varies with load.

Input voltage - Key closed

Base
The key being pressed grounds the node to 0V. Now the input to Rb is 0V and the base is at a higher potential than the emitter. This means the inherent voltage drop across the base-emitter diode, Vbe, comes into play. There is now a voltage divider made up of Rb, Vbe diode drop, Re and Rd. The base voltage is therefore a function of this divider and can be calculated thus.

-7V - Vbe = -6.3V 

Vb = -6.3V x (Rb)/(Rb + Re + Rd)

Vb = -7.45mV

The transistor is switched ‘on’ by this drop across base-emitter. Relative to Vc when it’s 0V, Vb is almost as high and the transistor is effectively in saturated mode. When Vc is open-circuit there is no collector current, so it’s effectively just a diode.

Emitter
The emitter voltage, Ve, must be Vbe lower than Vb which places it at -7.45mv - 0.6V = -607.45mV

Output Voltage - key closed

 The voltage divider Re Rd is now between Ve -0.607V and -7V. The voltage drop is thus 6.393V and the divider outputs a theoretical 0.014V.

That is the steady state voltage of this node anyway. The output voltage will rise to this near 0V level as the capacitor charges.

Current

There is only a small current once the capacitor is charged and actually the interesting thing here is the charging time, not the specific current.
Charging time (which I will call Tc) is a product of the series resistance and capacitance, which give the value of  tau - the time constant. The full charge time is effectively infinite, so to make this easier I've chosen a fully charged time of 5 x tau. Hence Tc  = 5RC.
5tau is the point at which 99.3% charging is achieved, and the voltage at Tc is therefore 0.993 x Vsteadystate. That's important!

Slow charge

First, let's look at the current when the collector is open circuit. This is the 'slow' setting and the collector current (Ic) is 0A.
In this state, the only current charging the capacitor comes via the base-emitter junction's current (Ibe). The base-emitter current Ibe is set by the 12K Rb and the 2K2 Re. In our case that is 14.4KOhm total.
Thus Tc = 5 x 14200 x 0.0000068 = 490ms. Right...?

In fact, this calculation is wrong because it ignores Rd. As we saw above, Re and Rd are a voltage divider, but how does that effect the charging time? The total R for our RC circuit is Rb+Re and Rd in parallel (and lets call Rb+Re 'Rbe').

The calculation for the parallel resistance is (Rbe x Rd)/(Rbe+Rd)
14,400,000/1,014,400 = 14,195.6KOhm
Which is only slightly less than Rbe, but if we start changing these values later it's worth getting this sort of thing correct from the beginning.
So:
tau = CR= 0.0000068 x 14,195.6  = 96.56ms
Tc  = 5tau = 483ms.

Is that right? I have simulated this circuit, and it is right! Not exactly, but very close. In fact, it is exactly right if you ignore the transistor and simulate it with only the resistors and capacitors.

Simplified RC circuit

In this simplified circuit the steady state voltage is 99.369mV (there's no Vbe to account for). Thus the total voltage charged is 6.90063V.
We're looking for 99.3% of that at Tc, which is 6.85V.
-7+6.85 = -148mV.
Which is almost exactly what the trace from my simulation shows at t=483ms (this application doesn't allow precise measurement, so the marker is the closest I could get.

With the transistor in the circuit, Tc is something like 531ms in the simulation.

Working that backwards...

531ms/5 =  106.2 ms = tau

R = 106.2ms/6.8uF = 15.617KOhm.

So, the base-emitter junction is adding around 1.2K of resistance to the circuit. I might need to come back to that, but for all intents it is a minor issue. As I will be increasing this overall resistance to achieve longer attack times this is trivial.

Using the sum of  the resistances Rb, Re and Rd and the total voltage drop of -7V the current through through this circuit should be:

I = V/R = -7/1,015,200 = -6.9 uA

Which is around what I get in simulation (6.4uA)  allowing for the approximate 1K of the base-emitter junction.

 Fast Charge

In this state the collector is grounded, there is no impedance at all there (no Rc) and Ic is effectively unlimited. Now the current Ice is contributing to the capacitor charging, so there is more current than is provided by the base-emitter alone. This leads to a faster charge and sharper attack.

The steady state current will be approximately, the same as with the collector open-circuit because only 12K will be removed from the calculation. It's now calculated as 6.976uA or 6.5 uA in simulation.

For the RC calculation though, removing the 12K has a more profound effect because large value for Rd (1M) is largely irrelevant.


R = RcRd/Rc+Rd = 2.195KOhm

tau = 2.195e3 x 6.8e-6 = 14.9ms.

Tc = 5tau = 74.6ms

Again this is the idealised model. With the transistor in simulation I got around 107ms for Tc (tau = 21.4ms).

Fast charge with transistor - Vd = 510mV

Which, calculating backwards, comes to a resistance of 3.147KOhm. So, again, about 1K of additional resistance due to the transistor, which is now more significant.

Original Design - Conclusions

Specification 

We only care about two parameters in the attack circuit. The output voltage and the time taken to reach it.

If we take 99.3% of the output voltage as being 'fully' charged and use it as our definition of when of this attack envelope time has elapsed then the two settings offered by the original SS-30 design are

• Normal (fast) - 107ms
• Slow - 531ms

And note also that the output voltage varies slightly (93mV) between normal and slow settings.

• Normal -465mV
• Slow -558mV

The output voltage is a function of Vbe and the voltage divider between Rb+Re and Rd.

Emitter Resistor

Increasing Re will result in lower (more negative) output voltages. It will also increase the ‘fast’ attack time. Neither which are wanted.

Lowering Rc will only lower the output voltage slightly, as Rd will still account for most of the voltage difference. It will also decrease the attack time (At), most noticeably for the fast attack. That could be worth doing!

Re↑ = At↑ & Vo↓

Re↓ = At↓ 

Base Resistor

Increasing the base resistor will increase the charging time for slow attack but would not significantly effect the fast attack.

It will significantly affect the output voltage when increased though, because the voltage divider created by Rb+Re and Rd sets Vo. As Rb approaches Rd Vo will decrease.

The collector current depends on Ib to a small degree but if  Vb is kept at near 0V there is little overall impact to the the Ice current unless Rb is extremely high.

There is no benefit to decreasing Rb.

Rb↑ = At↑ &  Vo↓

Discharge Resistor

Changing Rd will affect the Sustain time. The 1MOhm discharge resistor is high enough that it mostly cancels out when calculating the R value for the CR charging time, due to the product/sum calculation for parallel resistance.
i.e. R is always approximately Rb+Re.
If that ratio changes, then the effect will not be a linear relationship, again due to the product/sum calculation.

Collector

The collector has no Rc resistor and is either short to ground or open-circuit. Shorting the collector to ground kills any Vc voltage created across Vce, but when it is open-circuit there is a voltage potential there, which is shared across all the attack circuits.

Conclusion

Increase Rb to increase attack time and the output voltage will drop. A solution is needed which can maintain the voltage but still decrease the current to the capacitor. Care must be taken with Vc, which is common.

Improved Design? 

The desired improvements are two-fold

1. Improved range of the attack times (faster and slower)
2. Variable control of the range

Variable Control

Let’s start by replacing the Attack switch with a variable resistor and look at the state when the key is down and the transistor is on.

Voltage

When Rc is zero:

• No difference to orginal design
• Vc = Ve
• The fast attack is just the same. 

When the resistance Rc is non-zero:

• Vc is no longer equivalent to Ve as is divided between Rc and Vce.
• Rc and Rb are now in parallel.

But:

• Rc is still in series with Re.
• Rb in still series with Re

Vo is thus now influenced by Rc as well as Rb and Re.

Let's call the parallel Rc and Rb resistance, Rcb.

Rcb  = (Rc*Rb)/(Rc+Rb)


Assuming Rb is still fixed at 12K what effect does Rc have on the output voltage? In summary very little. If it's very large it's effect is nullified by the moderately sized Rb. If it's very small it still has no real impact on Vo because Rd is still very large in comparison.

This means that whilst Rb is unchanged in relation to Rd, Rc can be any value. As we will see below though, when Rb is larger things get more interesting

Current

As already noted, adding a variable Rc control does nothing to effect the fast charge time, which is still a short circuit from ground. 

Also noted above, we can set the value of Rc to any value we like if Rb is the same because the output voltage is largely unaffected, due to the large value of Rd and the parallel resistance with Rb.

The value of Rc should then be high enough to mean most of the current for charging the capacitor is coming from Rb, as in the original design.

Again, assuming Rb is still 12K, what value would we use to make the attack time variable, but within the same limits? Recall that the charging time is given by R*C and R is the parallel resistance was Rbe and Rd. It's now the parallel resistance of Rc and Rb + Re in parallel with Rd. To achieve the same overall value for R, and thus the same attack time, Rc must be as high as possible. The higher it is, the closer Rc and Rb in parallel will be to just Rb.

That analysis is just for a single transistor though. When there are 49 transistors all taking current from Rc is that still valid? Err, Yes! I simulated up to 12 transistors and the results are identical. the charging time is apparently unaffected.

Longer Attack

Increasing the 'slow' charging time, whilst leaving the short time setting unaffected, can only be achieved by increasing Rb.

• If Rc is zero then Vo is more or less still Ve,  and because Vc = Ve Vc = 0V - Vbe
• If Rc is infinite then Vo will drop too low (e.g. -4V) so the value of Rc must be low enough to keep Vo more than -1V and preferably nearer to 0V - Vbe.
• If Rc is non-zero, but too low, then the attack time will still be 'short'. 

I want a significantly longer attack time, so let's set Rb to 1.2M.
Previously I stated that the value of Rc doesn't matter to Vo. That was if Rb = 12K, now it does. If Rc is infinite and  Rb is 1.2M then Vo is far too low.  In which case Rc must be low enough in so that in parallel with Rb the total value of R is still higher than 12K.
Charging will only match the original 'slow' time when R = 12K and if Rb = 12M then  Rc = 13.3333K. Increasing Rc by another factor to 100K give a total Rcb of 54.5K and now the charging time is a respectable amount longer. Let's do that maths.

 Recall that R was (Rbe x Rd)/(Rbe+Rd).

Now Rbe is Rbce :-

Rbce = Rbc + Re = (Rb x Rc)/(Rb + Rc) + Re = 54.5K + 2K2 = 56.7K

R = (56.7K x 1M)/(56.7K +1M) = 53,657.61


RC  = tau = 53657.61 Ohms  x 6.8e-6 Farads = 364.872ms
At = 5tau = 5x 365ms  = 1.82 seconds.

1.82 vs 0.531ms = 3.4 times longer. Not bad. But I'd prefer an even longer time. To do that I need to increase the total Rbe to increase the charging time whilst keeping the voltage within limits.

The voltage is determined by Rbc+Rbe and Rd as a divider.

 Vo = Vin x (Rbc+Re)/(Rbc+Re+Rd)

As Vin is around -6.3V (after Vbe is deducted) and Rd is 1M Ohm and V0 must be between -Vbe (0.7) and -1V we can rearrange the equation and get a range of value for Rbe like so.

If Vo = 1V
(6.3Rbc + 13,860)/1 = Rbc + 1,002,200
6.3Rbc + 13,860 = Rbc + 1,002,200

6.3Rbc = Rbc + 988,340

5.3Rbc = 988,340
Rbc  =  186,479KOhms

So, Rbc needs to be somewhere between 14K to 186K Ohms, for the voltage to be right.
Obviously, close to 14K is better, for the voltage to be as high as possible, but that's pretty close to the original 12K value for Rbc where Rc is infinite (open-circuit).

If Rbc was 186K then RC would be

R = 188200 in parallel with 1M  = 158,390.84Ohms

RC = 158,390.84 x 6.8e-65 = 1.27976 seconds
At  = 6.3 seconds.

That seems pretty good but this is with Vo at -1V.  Ideally it would be closer to the worst case in the unmodified form

• Slow -558mV

So if Vo = 558mV
(6.3Rbc + 13,860)/0.558 = Rbc + 1,002,200
12.186Rbc + 25,063 = Rbc + 1,002,200
11.186 x Rbc = 977,137
Rbc = 87,353 Ohms

R  = 87.353K in parallel with 1M = 80335.46

RC = 80,335.46 * 6.8e-6 = 594ms

At = 2.97

As Vout decreases At increases. I think I would be happy with 3 seconds of attack time, but I'm concerned about the margin for error here.

Simulation.

Next step was to try some simulations. I set-up four identical circuits with Rc set to a useful value for a potentiometer and set Rb to whatever I wanted to achieve a certain value for Rbc

Here are the results:

Rbc = 14k  Vo=-496mV At = 0.547

Rbc = 54k Vo = -582mV At = 1.75

Rbc = 87k Vo = -678mV At = 2.72

Rbc = 115k Vo = -1.054V At = 3.621

The next step is to try this out. I need to measure the actual voltages and recalculate before changing anything. The best thing to try is probably Cello on the minimum split setting. Then I can change as few resistors as possible.
After that, if everything looks good, I will also try reducing Re and see what a faster attack is like.

Here endeth Part. 1